Latches and Sequential Logic Circuits

This is lab 9 of 18 in the course
This lab introduces students to latches and sequential logic circuits, including basic concepts, variations, and applications. In the activity, students will use Multisim to build and simulate circuits to observe differences between synchronous and asynchronous sequential circuits, test and compare circuits for D latches, confirm the characteristic table of a gated SR latch, and observe the differences between D and SR latches.